Todai Entrance Exam: Subject 2019 – Problem 1

(1) Thanks to this lecture note by MIT, it seems like R_{in} = \infty is to indicate that the path from the point V_{m} to the point - of the amplifier has 0 current. And the point of R_{out} = 0? Well, I’m not sure: a slide from University of Kansas.

    \[ \frac{V_{in} - V_{m}}{R_{1}} = \frac{V_{m} - V_{out}}{R_{2}} \Leftrightarrow \frac{V_{in} + \frac{V_{out}}{A}}{R_{1}} = \frac{-\frac{V_{out}}{A} - V_{out}}{R_{2}} \Leftrightarrow V_{out} = \frac{-AR_{2}}{1 + R_{1} + R_{1}A}V_{in} \]


    \[ \lim_{A \rightarrow \infty}\frac{-AR_{2}}{1 + R_{1} + R_{1}A} = \lim_{A \rightarrow \infty}\frac{-R_{2}}{\frac{1}{A} + \frac{R_{1}}{A} + R_{1}} = -\frac{R_{2}}{R_{1}} \]

Reference: Khan Academy and the slide from University of Kansas.

(3) Virtual ground. Reference: Khan Academy.

(4) Thanks to slide 8 of Georgia Tech, this is Binary Weighted Input DAC:

(a) 2R

(b) 4R

(c) 8R

(5) It is given from (3) that ideal operational amplifiers have v_{-} = 0. So:

    \[ \frac{-V_{out}}{R_{f}} = V_{REF}\sum_{i = 0}^{3} b_{i}\frac{1}{2^{3-i}R} \Leftrightarrow V_{out} = -V_{REF}R_{f}\sum_{i = 0}^{3} b_{i}\frac{1}{2^{3-i}R} \]

(6) This is R-2R DAC, which is proved starting from slide 12 of Georgia Tech. A note here is that they are using Thevenin method (reference).

(7) R_{f} = R_{f}'?

(8) The circuit in Fig 3 is more numerically efficient than the circuit in Fig 2 as the number of bits becomes big, Fig 2 will require resistors with large impedance, which can be costly and error-prone. Yet, the circuit in Fig 2 requires less number of resistors and it is easier to be implemented, which can be ideal of a small number of bits.

The slide 11 and 16 of Georgia Tech also suggests the speed of conversion in Fig 2 will be faster than in Fig 3. I guess this is due to the fact that the current in Fig 3 must go through a resistor R before it can get to the resistor 2R (except for the MSB).


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